RICARDO ANTONIO CARMONA GALAN
Fixed Pattern Noise Analysis for Feature Descriptors in CMOS APS Images
Compact macro-cell with or pulse combining for low power digital-sipm
Compressive Imaging using RIP-compliant CMOS Imager Architecture and Landweber Reconstruction
Comparison between Digital Tone-Mapping Operators and a Focal-Plane Pixel-Parallel Circuit
PreVIous: A Methodology for Prediction of Visual Inference Performance on IoT Devices
Low-Noise and High-Efficiency Near-IR SPADs in 110nm CIS Technology
TOF estimation based on compressed real-time histogram builder for SPAD image sensors
Optimum Selection of DNN Model and Framework for Edge Inference
On the Analysis and Detection of Flames with an Asynchronous Spiking Image Sensor
CMOS Vision Sensors: Embedding Computer Vision at Imaging Front-Ends
Real-Time Inter-Frame Histogram Builder for SPAD Image Sensors
Guest editorial: Special issue on computational image sensors and smart camera hardware
Applications of event-based image sensors - Review and analysis
Asynchronous spiking pixel with programmable sensitivity to illumination
Compensation of PVT variations in ToF imagers with in-pixel TDC
Gaussian Pyramid: Comparative Analysis of Hardware Architectures
TFET-based well capacity adjustment in active pixel sensor for enhanced high dynamic range
Sun Sensor Based on a Luminance Spiking Pixel Array
A CMOS Digital SiPM with Focal-Plane Light-Spot Statistics for DOI Computation
https://digital.csic.es/handle/10261/195296
Pipeline AER Arbitration with Event Aging
Photon Counting and Direct ToF Camera Prototype based on CMOS SPADs (Single-Photon Avalanche-Diode)
Arrayable Voltage-Controlled Ring-Oscillator for Direct Time-of-Flight Image Sensors
Low-Power CMOS Vision Sensor for Gaussian Pyramid Extraction
Live Demonstration: Photon Counting and Direct ToF Camera Prototype Based on CMOS SPADs
A Bio-Inspired Vision Sensor With Dual Operation and Readout Modes
Compact CMOS active quenching/recharge circuit for SPAD arrays
Enhanced Sensitivity of CMOS Image Sensors by Stacked Diodes
Enhanced sensitivity of CMOS image sensors by stacked diodes
Image feature extraction acceleration
In-Pixel Voltage-Controlled Ring-Oscillator for Phase Interpolation in ToF Image Sensors
Single-Exposure HDR Technique Based on Tunable Balance Between Local and Global Adaptation
Special issue on architectures of smart cameras for real-time applications
Time interval generator with 8 ps resolution and wide range for large TDC array characterization
On the calibration of a SPAD-based 3D imager with in-pixel TDC using a time-gated technique
Real-time single-exposure ROI-driven HDR adaptation based on focal-plane reconfiguration
A SPAD-based 3D imager with in-pixel TDC for 145ps-accuracy ToF measurement
On-chip time-of-flight estimation in standard CMOS technology
Live Demonstration: Gaussian Pyramid Extraction with a CMOS Vision Sensor
Detecting single-electron events in TEM using low-cost electronics and a silicon strip sensor
High dynamic range adaptation for ROI tracking based on reconfigurable concurrent dual-sensing
Detecting single-electron events in TEM using low-cost electronics and a silicon strip sensor
A hierarchical vision processing architecture oriented to 3D integration of smart camera chips
Polar marine biology science in Portugal and Spain: Recent advances and future perspectives
IC-PCR 1000 Control Using a Wireless Sensor Network
Ultralow-Power Processing Array for Image Enhancement and Edge Detection
CMOS-3D Smart Imager Architectures for Feature Detection
Ultralow-power processing array for image enhancement and edge detection
Early forest fire detection by vision-enabled wireless sensor networks
FLIP-Q: A QCIF Resolution Focal-Plane Array for Low-Power Image Processing.
All-MOS implementation of RC networks for time-controlled Gaussian spatial filtering.
On the implementation of linear diffusion In transconductance-based cellular nonlinear networks
A vision-based monitoring system for very early automatic detection of forest fires
Performance evaluation and limitations of a vision system on a reconfigurable/programmable chip
A 1000 FPS at 128×128 vision processor with 8-bit digitized I/O
Reaction-Diffusion Navigation Robot Control: From Chemical to VLSI Analogic Processors
ACE16K: The Third Generation of Mixed-Signal SIMD-CNN ACE Chips Toward VSoCs
Second-order neural core for bioinspired focal-plane dynamic image processing in CMOS
CMOS realization of a 2-layer CNN universal machine chip.
A Bio-Inspired Two-Layer Mixed-Signal Flexible Programmable Chip for Early Vision
An 0.5-μm CMOS analog random access memory chip for teraops speed multimedia video processing
A CNN universal chip in CMOS technology
A VLSI-oriented continuous-time CNN model
CMOS optical-sensor array with high output current levels and automatic signal-range centring
Low-Power Smart Imagers for Vision-Enabled Sensor Networks
Image feature extraction acceleration
Focal-plane dynamic texture segmentation by programmable binning and scale extraction
VISCUBE: A Multi-Layer Vision Chip
Cellular Multi-core Processor Carrier Chip for Nanoantenna Integration and Experiments
CMOS ANALOG DESIGN PRIMITIVES
On the implementation of linear and non-linear interaction operators for CNNs
On the Correlation of CNN Performance and Hardware Metrics for Visual Inference on a Low-Cost CPU-based Platform
Low-Noise and High-Efficiency Near-IR SPADs in 110nm CIS Technology
A survey on FPGA-based high-resolution TDCs
CNN Performance Prediction on a CPU-based Edge Platform
Impact of CNNs Pooling Layer Implementation on FPGAs Accelerator Design
ToF Estimation Based on Compressed Real-Time Histogram Builder for SPAD Image Sensors
On the implementation of asynchronous sun sensors
An Experimentally-Validated Verilog-A SPAD Model Extracted from TCAD Simulation
Optimum Network/Framework Selection from High-Level Specifications in Embedded Deep Learning Vision Applications
CMOS-SPAD camera prototype for single-sensor 2D/3D imaging
Results of 'iCaVeats', a project on the integration of architectures and components for embedded vision
On the characterization of light sources irradiation profiles with an HDR image sensor
On-The-Fly Deployment of Deep Neural Networks on Heterogeneous Hardware in a Low-Cost Smart Camera
Asynchronous spiking pixel with programmable sensitivity to illumination
1D Cellular Automata for Pulse Width Modulated Compressive Sampling CMOS Image Sensors
Color Tone-Mapping Circuit for a Focal-Plane Implementation
Live Demonstration: Low-Power Low-Cost Cyber-Physical System for Bird Monitoring
Arrayable Voltage-Controlled Ring-Oscillator for Direct Time-of-Flight Image Sensors
Gaussian Pyramid: Comparative Analysis of Hardware Architectures
Performance analysis of real-time DNN inference on Raspberry Pi
Concurrent focal-plane generation of compressed samples from time-encoded pixel values
A sun sensor implemented with an asynchronous luminance vision sensor
Characterization of Electrical Crosstalk in 4T-APS Arrays using TCAD Simulations
Design of a Compact and Low-Power TDC for an Array of SiPM¿s in 110nm CIS Technology
Compressive Image Sensor Architecture with On-Chip Measurement Matrix Generation
TCAD Simulation of Electrical Crosstalk in 4T-Active Pixel Sensors
VCRO-based TDCs in submicron CIS technology
On the design of sun sensors with event-based operation
Introduction to ACHIEVE: a European Training Network based on the experience of EUNEVIS
Compressed Sampling CMOS Imager based on Asynchronous Random Pixel Contributions
Gaussian Pyramid: Comparative Analysis of Hardware Architectures
Photon Counting and Direct ToF Camera Prototype based on CMOS SPADs (single-photon avalanche-diode)
Live Demonstration: Photon Counting and Direct ToF Camera Prototype Based on CMOS SPADs
Pipeline AER Arbitration with Event Aging
A Compressive Domain Saliency-Based Adaptive Measurement Method for Image Recovery
Pixel-wise parameter adaptation for single-exposure extension of the image dynamic range
HDR image sensor with linear response and asynchronous detection of saturation
Demo: Image Sensing Scheme Enabling Fully-Programmable Light Adaptation and Tone Mapping with a Single Exposure
Experimental Evidence of Power Efficiency due to Architecture in Cellular Processor Array Chips
Image dynamic range extension by using stacked (unmatched) photodiodes in CMOS
Non-Recursive Method for Motion Detection from a Compressive-Sampled Video Stream
Hardware-aware performance evaluation for the co-design of image sensors and vision algorithms
In-Pixel Voltage-Controlled Ring-Oscillator for Phase Interpolation in ToF Image Sensors
Live Demonstration: Single-Exposure HDR Image Acquisition Based on Tunable Balance Between Local and Global Adaptation
High-level performance evaluation of object detection based on massively parallel focal-plane acceleration requiring minimum pixel area overhead
A high dynamic range linear vision sensor with event asynchronous and frame-based synchronous operation
Focal-plane scale space generation with a 6T pixel architecture
On the Design of a Sparsifying Dictionary for Compressive Image Feature Extraction
CMOS Image Sensor Architecture for Focal Plane Early Vision Processing
Hardware-oriented feature extraction based on compressive sensing
A high dynamic range image sensor with linear response based on asynchronous event detection
Assessment of circuit non-idealities' effect on algorithm performance via OpenCV modeling
Compressive Feature Extraction
Automatic DR and spatial sampling rate adaptation for secure and privacy-aware ROI tracking based on focal-plane image processing
On the Calibration of a SPAD-Based 3D Imager with in-Pixel TDC Using a Time-Gated Technique
Live demonstration: Gaussian pyramid extraction with a CMOS vision sensor
Real-time single-exposure ROI-driven HDR adaptation based on focal-plane reconfguration
A SPAD-based 3D imager with in-pixel TDC for 145ps-accuracy ToF measurement
Wide Range 8ps Incremental Resolution Time Interval Generator based on FPGA technology
Fire detection with a frame-less vision sensor working in the NIR band
Towards an ultra-low-power low-cost wireless visual sensor node for fine-grain detection of forest fires
Demo: A prototype vision sensor for real-time focal-plane obfuscation through tunable pixelation
A QVGA Vision Sensor with Multi-functional Pixels for Focal-Plane Programmable Obfuscation
A CMOS 0.18um 64x64 Single Photon Image Sensor with in-Pixel 11b Time-to-Digital Converter
A 26.5 nJ/px 2.64Mpx/s CMOS vision sensor for gaussian pyramid extraction
Gaussian Pyramid Extraction with a CMOS Vision Sensor
Comparative Analysis of Compressive Sensing Strategies for Smart Compressive Image Sensors
Live Demo: Real-time Focal-plane Face Obfuscation through Programmable Pixelation
Parallel Processing Architectures and Power Efficiency in Smart Camera Chips
Form Factor Improvement of Smart-Pixels for Vision Sensors through 3-D Vertically-Integrated Technologies
Smart imaging for power-efficient extraction of Viola-Jones local descriptors
A 176x120 Pixel CMOS Vision Chip for Gaussian Filtering with Massivelly Parallel CDS and A/D-Conversion
A CMOS 8×8 SPAD array for Time-of-Flight measurement and light-spot statistics
An ultra-low-power voltage-mode asynchronous WTA-LTA circuit
Low-Power Vision Chips based on Focal-Plane Feature Extraction for Visually-Assisted Autonomous Navigation
Real-Time Remote Reporting of Motion Analysis with Wi-Flip
Power-Efficient Focal-Plane Image Representation for Extraction of Enriched Viola-Jones Features
In-Pixel Generation of Gaussian Pyramid Images by Block Reusing in 3D-CMOS
Design of a smart camera SoC in a 3D-IC technology
A CMOS-3D Reconfigurable Architecture with In-pixel Processing for Feature Detectors
ANÁLISIS MULTIVARIANTE DE LAS RELACIONES MANEJO AGRONÓMICOPRESENCIA DE Sorghum halepense EN CULTIVOS DE MAÍZ
Image filtering by reduced kernels exploiting kernel structure and focal-plane averaging
Switched-capacitor networks for scale-space generation
Demo: Real-time remote reporting of active regions with Wi-FLIP
Wi-FLIP: A wireless smart camera based on a focal-plane low-power image processor
Focal-plane generation of multi-resolution and multi-scale image representation for low-power vision applications
Design of a smart SiPM based on focal-plane processing elements for improved spatial resolution in PET
Multi-resolution low-power Gaussian filtering by reconfigurable focal-plane binning
In-pixel ADC for a vision architecture on CMOS-3D technology
ON-SITE FOREST FIRE SMOKE DETECTION BY LOW-POWER AUTONOMOUS VISION SENSOR
A prototype node for wireless vision sensor network applications development
CIRCUITAL AND ARCHITECTURAL CHALLENGES FOR THE DESIGN OF PET MEDICAL IMAGING SYSTEMS USING CMOS
A 3-D Chip Architecture for Optical Sensing and Concurrent Processing
Offset-compensated comparator with full-input range in 150nm fdsoi cmos-3d technology
Digital processor array implementation aspects of a 3D multi-layer vision architecture
ROBUST FOCAL-PLANE ANALOG PROCESSING HARDWARE FOR DYNAMIC TEXTURE SEGMENTATION
Simplified state update calculation for fast and accurate digital emulation of CNN dynamics
Accurate Design of a MOS-based Resistive Network for Time-Controlled Diffusion Filtering
3D multi-layer vision architecture for surveillance and reconnaissance applications
Low-Power Focal-Plane Dynamic Texture Segmentation Based on Programmable Image Binning and Diffusion Hardware
A VLSI-Oriented and Power-Efficient Approach for Dynamic Texture Recognition Applied to Smoke Detection
A Vision-Based Monitoring System for Very Early Automatic Detection of Forest Fires
- DETECTOR PARA MEDIR LA ENERGIA DE ELECTRONES EN MICROSCOPIOS ELECTRONICOS DE BARRIDO
- DEVICE FOR DETECTING EDGES AND IMPROVING THE QUALITY OF AN IMAGE
- DEVICE FOR DETECTING EDGES AND IMPROVING THE QUALITY OF AN IMAGE
- DEVICE FOR THE HARDWARE DETECTION OF LOCAL EXTREMES IN AN IMAGE
- DEVICE FOR THE HARDWARE DETECTION OF LOCAL EXTREMES IN AN IMAGE
- DISPOSITIVO PARA LA DETECCION HARDWARE DE EXTREMOS LOCALES EN UNA IMAGEN
- DISPOSITIVO PARA LA DETECCION HARDWARE DE EXTREMOS LOCALES EN UNA IMAGEN
- DISPOSITIVO PARA LA DETECCION HARDWARE DE EXTREMOS LOCALES EN UNA IMAGEN
- DISPOSITIVO PARA LE DETECCION DE BORDES Y MEJORA DE CALIDAD EN UNA IMAGEN
- DISPOSITIVO PARA LE DETECCION DE BORDES Y MEJORA DE CALIDAD EN UNA IMAGEN
- FOTOMULTIPLICADOR DIGITAL DE COMBINACION OR DE PULSOS
- FOTOMULTIPLICADOR DIGITAL DE COMBINACION OR DE PULSOS
- HARDWARE PARA COMPUTO DE LA IMAGEN INTEGRAL
- HARDWARE PARA COMPUTO DE LA IMAGEN INTEGRAL
- IMAGE PROCESSOR FOR FEATURE DETECTION
- METODO Y DISPOSITIVO DE DETECCION DE PICO DEL HISTOGRAMA COMPRIMIDO DE LOS VALORES DE PIXEL EN SENSORES DE TIEMPODEVUELO DE ALTA RESOLUCION
- METODO Y DISPOSITIVO DE DETECCION DE PICO DEL HISTOGRAMA COMPRIMIDO DE LOS VALORES DE PIXEL EN SENSORES DE TIEMPODEVUELO DE ALTA RESOLUCION
- METODO Y DISPOSITIVO DE DETECCION DE PICO DEL HISTOGRAMA COMPRIMIDO DE LOS VALORES DE PIXEL EN SENSORES DE TIEMPODEVUELO DE ALTA RESOLUCION
- PIXEL CELL HAVING A RESET DEVICE ASYMMETRIC CONDUCTION
- PROCESADOR DE IMAGENES PARA EXTRACCION DE CARACTERISTICAS
- PROCESADOR DE IMAGENES PARA EXTRACCION DE CARACTERISTICAS
- SENSOR DE ELECTRONES PARA MICROSCOPIA ELECTRONICA
- SENSOR DE ELECTRONES PARA MICROSCOPIA ELECTRONICA
- SENSOR DE ELECTRONES PARA MICROSCOPIA ELECTRONICA
- SENSOR DE ELECTRONES PARA MICROSCOPIA ELECTRONICA
- SENSOR DE ELECTRONES PARA MICROSCOPIA ELECTRONICA
- SENSOR DE ELECTRONES PARA MICROSCOPIA ELECTRONICA
- SENSOR DE IMAGENES
- SENSOR DE IMAGENES
- WEARABLE CAMERA APPARATUS WITH SELECTABLE PROCESSING OF IMAGE CONTENT
- DETECTOR PARA MEDIR LA ENERGIA DE ELECTRONES EN MICROSCOPIOS ELECTRONICOS DE BARRIDO
- FOTOMULTIPLICADOR DIGITAL DE COMBINACION OR DE PULSOS
- FOTOMULTIPLICADOR DIGITAL DE COMBINACION OR DE PULSOS
- DISPOSITIVO DETECTOR SEMICONDUCTOR DE PARTICULAS IONIZANTES
- ASYNCHRONOUS PIXEL ARRAY FOR SINGLESHOT CONCURRENT AUTOEXPOSURE AND HDR IMAGING
- ASYNCHRONOUS PIXEL ARRAY FOR SINGLESHOT CONCURRENT AUTOEXPOSURE AND HDR IMAGING